1. Field
Exemplary embodiments relate to electronic circuits, and more particularly, to a phase locked loop circuit, a semiconductor memory device including a phase locked loop circuit, and a method of operating a phase locked loop circuit.
2. Description of the Related Art
A phase locked loop circuit compares a phase of an input clock signal with a phase of a feedback clock signal, and controls the two signals so that phases of the two signals are synchronized with each other. A phase locked loop circuit may be used in a semiconductor integration circuit such as a semiconductor memory device.
A phase locked loop circuit may include a phase detector, a charge pump circuit, a loop filter embodied by a low pass filter, and a voltage controlled oscillator.
The phase detector detects a phase difference between an input clock signal and a feedback clock signal output from the voltage controlled oscillator. The charge pump circuit charges electric charges in the loop filter or discharges the electric charges charged in the loop filter in response to an output signal of the phase detector. The voltage controlled oscillator outputs a feedback clock signal synchronized with an input clock signal in response to a voltage corresponding to electric charges charged or discharged in the loop filter.